[uClinux-dev] Build SMP uClinux on NIOS II processors

Michael Schnell mschnell at lumino.de
Mon Feb 16 03:56:29 EST 2009


> You can tell Linux to explicitly flush cache lines, so that you don't
> need consistency in hardware.  You only need cache line flushing
> instructions, which is simpler hardware.
>   
How would this work if two user programs share a common memory area ?

I suppose, the kernel needs to maintain some commonly used areas for 
inter-task communication etc. If all of them are defined as 
non-cacheable, I suppose this might slow down the system greatly in 
appropriate applications.
> You need those instructions anyway if you have peripherals doing DMA
> to main memory, so you might not need any changes to the hardware cache.
>   
Right you are. With NIOS hardware this is exceptionally easy, as just 
setting address bit 31 marks the access as non-cacheable. The NIOS 
Kernel of course provides the standard macros to make used of this.

-Michael



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