[uClinux-dev] Re: mach-atmel (Atmel AT91) interrupt controller

Shaun Jackman sjackman at gmail.com
Thu Oct 13 20:10:32 EDT 2005


I found that mach-atmel does in fact read the
interrupt-vector-register, IVR. This is done in
include/asm-arm/arch-atmel/entry-macro.S (get_irqnr_and_base).

The boot hangs at init/calibrate.c (calibrate_delay) line 45: while
(ticks == jiffies). At this point the timer/counter interrupt, TC1, is
unmasked, the interrupt-pending-register says there is a TC1 interrupt
pending. The interrupt-status register says there is no other
interrupt currently being serviced, the CPSR says that the global IRQ
interrupt is unmasked, and yet the core-interrupt-status-register says
that NIRQ is not asserted. Why do I have a pending TC1 interrupt but
no NIRQ?

AIC_IMR: 0x20 TC1
AIC_IPR: 0x20 TC1
AIC_ISR: 0
CPSR: 0x60000053 FIQ MODE_SVC
AIC_CISR: 0x0

Thanks,
Shaun



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