[uClinux-dev] mach-atmel (Atmel AT91) interrupt controller

Shaun Jackman sjackman at gmail.com
Thu Oct 13 18:54:01 EDT 2005

I have an Atmel AT91M40800 based board that I'm using with the
mach-atmel architecture. The first timer interrupt is generated, and
atmel_timer_interrupt is called, but I never receive a subsequent
interrupt, and so the boot hangs in calibrate_delay because jiffies
stops incrementing. jiffies gets to 0xffff8ad1 and never any further.
Is anyone else using mach-atmel, and what is your experience with the
interrupt controller, namely, does it work?

I noticed that the interrupt handler never reads the interrupt vector
register AIC_IVR, although it does write to the end-of-interrupt
register, AIC_EOI. I understood that reading the IVR sets up the
interrupt context, while writing to the EOI tears down the interrupt
context. Is it valid not to read the IVR?

Finally, I noticed that atmel_timer_inerrupt never reads the
timer/counter status register, TC_SR, which I understood was necessary
to clear the "RC Compare Status" bit, TC_CPCS, which generates the
timer interrupt.

I would love to hear of the experiences from other people using the
mach-atmel architecture with uClinux.



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