[uClinux-dev] Re: soft_irq()
jwilliams at itee.uq.edu.au
Tue Mar 25 02:24:50 EST 2003
From: Miles Bader <miles at lsi.nec.co.jp>
>John Williams <jwilliams at itee.uq.edu.au> writes:
>>  For the curious, the microblaze return from interrupt instruction
>> 'rtid' takes two parameters, a link register, and an offset that gets
>> added to it to form the return address.
>That's an interesting feature; how is it used?
>I can see how it could be useful for a normal `ret' instruction (e.g.,
>with a calling convention that uses return offsets for error returns,
>etc; I seem to recall PDP10 code doing something like that), but it
>seems a bit odd for a `reti' insn, since you presumably will usually be
>returning to a fairly arbitrary location.
I think it is just to maintain instruction set orthogonality and processor
simplicity. All of the return instructions (from interrupts, breaks and
subroutines) have the same syntax and instruction format (link register and
a small integer offset). The only difference is that rtid enables
interrupts (sets IE bit), rtbd (break) clears the break in progress (BIP)
status bit, and rtsd (subroutine) does neither, just branches.
Thinking about it, I wouldn't be surprised if there are 2 bits in the
instruction opcode that specify the "values" to be copied into these two
status bits (IE and BIP). That would make allow the same bit of logic to
decode all 3 return instructions.
Microblaze is about as RISCy as it gets.
Unfortunately due to the instruction fetch pipeline issue I mentioned
before, when returning from subroutines one must use rtsd rXX, 8, while
interrupts needs rtid rXX,0 to have the intended result.
As for what you could actually do with these variable return offsets, well
one great use is to create really cryptic bugs, as I've already discovered!
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