[uClinux-dev] ARM 946 I-cache problems

Thuys, Michiel michiel.thuys at intersil.com
Wed Nov 28 09:57:41 EST 2001


Hi Durgesh,

A lot of the functions in proc-arm940.S seem to be copied from
proc-arm920.S, which is quite a different processor (having a MMU).
Therefore, you should be careful using those functions as a basis for
the 946. On the platform we use, we have disabled all these functions
because we have a slightly different architecture, so I can't help you
with any details.

Michiel

-----Original Message-----
From: Durgesh Pattamatta [mailto:DPattamatta at valencesemi.com]
Sent: woensdag 28 november 2001 0:41
To: 'uclinux-dev at uclinux.org'; 'uClinux-dev at geekcreek.net'
Subject: [uClinux-dev] ARM 946 I-cache problems


Hi,

I am porting uclinux 2.4.10-uc1 to ARM 946ES processor on ARM Integrator
development platform. I am able to run kernel with busybox 0.52 on this
board without enabling I-cache and D-cache. The kernel works fine with
only
D-cache enabled also. But when I enable I-cache the kernel crashes
randomly
with data aborts or prefetch aborts (mostly after starting kswapd deamon
or
after mounting romfs). I have written cache flush routines (according to
ARM
946 mannual specs) for 946 in proc-arm946.s and linked with kernel. I
have
used the same technique used by proc-arm940.s to hook the flush routines
with kernel. It looks to me that I need to do something more to get
uclinux
kernel working with I-cache enabled. Did anyone face similar kind of
problem
with ARM940T based boards ? Since cache architecture of ARM940 and
ARM946
are similar. 

I would greatly appreciate if somebody could give some pointers/ tips to
solve this I-cache problems.

with best regards,
durgesh
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