[uClinux-dev] Strange ARM behaviour....

Fabrice Gautier Fabrice_Gautier at sdesigns.com
Wed Nov 21 15:35:35 EST 2001


Hi,

I'm using an EB63 atmel board, and i've some problem with the exception
vector setup.

The setup is done in arch/armnommu/entry-armv.S in the __trap_init function.

the function copy this vectors:

.LCvectors:	swi	SYS_ERROR0
		b	__real_stubs_start + (vector_undefinstr -
__stubs_start)
		ldr	pc, __real_stubs_start + (.LCvswi - __stubs_start)
		b	__real_stubs_start + (vector_prefetch -
__stubs_start)
		b	__real_stubs_start + (vector_data - __stubs_start)
		b	__real_stubs_start + (vector_addrexcptn -
__stubs_start)
		b	__real_stubs_start + (vector_IRQ - __stubs_start)
		b	__real_stubs_start + (vector_FIQ - __stubs_start)

with these 2 instructions :

		ldmia	r1, {r1, r2, r3, r4, r5, r6, ip, lr}
		stmia	r0, {r1, r2, r3, r4, r5, r6, ip, lr}

(ldm = load multiple, stm =store multiple) with r1 pointing to the vectors
above and r0 pointing to 0.

I use the ARM debugger with multiICE to see what's happening here. And what
happenging is that the stmia instruction doesn't store all the registers
correctly. The adresses 0, 4, 0xc and 0x10 are not updated byt the
instruction as they should. If I point r0 to any other adresse it works ok.
Just this 4 adresses are not updated. I can update then by hand in the
debugger but the code doesn't semm to ba able to do it.

Is there anybody who have an idea what's causing this behaviour ???

Thanks


-- 
Fabrice Gautier
Software Engineer, Sigma Designs
Fabrice_Gautier at sdesigns.com

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